FIG. 1 shows a schematic diagram of a conventional standard DMOS, made of a polysilicon, comprising a source 1, a gate 2 and a drain 3, and therein a given amount of parasitic capacitance will appear inevitably. When a DMOS performs a signal amplification or switch operation, the parasitic capacitance will induce a considerable delay. Thus, if the parasitic capacitance can be reduced, a faster DMOS with more usable frequencies can be accomplished thereby.
The parasitic capacitance is governed by the following equation:C=AKE0/t, wherein K is the dielectric constant of the insulating material;                E0 is the permitivity constant;        A is the area of the capacitor; and        t is thickness of the dielectric material.        
From the aforementioned equation, it is obvious that the parasitic capacitance can be reduced either by decreasing the area of the gate-drain overlapping region or by increasing the thickness of the dielectric material in that region.
Referring to FIG. 2 a schematic diagram of a DMOS fabricated by the LOCOS process, the polysilicon gate 4 runs across it, and therefore the thickness of the dielectric material of the gate 4-drain 6 overlapping region increases significantly, but the real gate channel remains the same, and thus the parasitic capacitance can be effectively reduced in this structure. However, this kind of structure is very sensitive to the misalignment with respect to the oxide island, and just a slight shift of the polysilicon alignment will alter the channel width and further affect the operating voltage and the gain of amplification.
The structure of the DMOS shown in FIG. 3 is based on the structure in FIG. 1, but the polysilicon width of the gate 7 is shrunk to reduce the area of the gate 7-drain 8 overlapping region so as to reduce the parasitic capacitance. However, as the width of the poly silicon becomes smaller, the tolerance of manufacturing process becomes extremely tight correspondingly, and consequently a mask and an exposure tool with a higher resolution are required.